Описание - N5980A
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The Keysight N5980A 3.125 Gb/s Manufacturing Serial BERT (Bit Error Ratio Tester) enables transceiver manufacturing test at one-third the price of the existing N4906B BERT. It also has twice the maximum test throughput with independent electrical and optical (SFP plug-ins) interfaces. Combined with the reduction in price, it reduces the cost of test by a factor of six.
In addition, the N5980A is six times smaller in size, which conserves valuable space, further lowering the cost of test and making it especially attractive for low-cost, high-throughput manufacturing test applications, such as gigabit transceiver manufacturing.
Read the latest press release regarding the Keysight Manufacturing Serial BERT: Keysight Technologies' 3 Gb/s BERT provides lowest cost of test for electrical and optical device manufacturing
- Standard measurements at rates between 155 Mb/s and 3.125 Gb/s
- Generation of Pseudo Random Bit Sequence (PRBS) polynomials and a K28.5 pattern at Low Voltage Differential Signal (LVDS) or Emitter Coupled Logic (ECL) levels
- Flexible connections to the device under test via 3.5 mm differential electrical coax connectors and/or standard optical SFP module plug-ins
- Optical and electrical error injection (once or at selectable Bit-Error-Ratio)
- Analysis of gated Bit-Error-Ratio with display of the absolute number of errors and selectability of gate time
- Dramatically simplified transceiver measurements that provide just the essential tests via the one page graphical user interface (running on an external Windows® XP PC via a USB 2.0 interface)
- Full programmability of all graphical user interface features from another software program, making automation in manufacturing an easy task
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- Dramatically simplified transceiver measurements that provide just the essential tests via the one page graphical user interface (running on an external Windows® XP PC via a USB 2.0 interface)
- Standard measurements at fixed rates between 125 Mb/s and 3.125 Gb/s
- Generation of Pseudo Random Bit Sequence (PRBS) polynomials and a K28.5 pattern at Low Voltage Differential Signal (LVDS) or Emitter Coupled Logic (ECL) levels
- Optical and electrical error injection (once or at selectable Bit-Error-Ratio)
- Analysis of gated Bit-Error-Ratio with display of the absolute number of errors and selectability of gate time
- Flexible connections to the device under test via 3.5 mm differential electrical coax connectors and/or standard optical SFP module plug-ins
- Full programmability of all graphical user interface features from another software program, making automation in manufacturing an easy task